Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the achievement of several key milestones in its ongoing strategic partnership with Intel Foundry. Furthering the companies’ collaboration on 3D-IC enablement, EDA flows and IP development across multiple Intel process nodes, beginning with Intel 18A Cadence announced the availability of a complete Embedded Multi-die Interconnect Bridge (EMIB) 2.5D advanced packaging flow, enhancements to the Intel 18A digital and custom/analog flows, a wide-ranging IP portfolio and the corresponding process design kits (PDKs) across various process nodes.

Key milestones of the ongoing Cadence-Intel Foundry collaboration include:

  • EMIB Reference Flow: The complete AI-driven Cadence® flow, with Integrity™ 3D-IC Platform integrating Allegro® X Advanced Package Designer (APD), Sigrity™ technologies, Clarity™ 3D Solver, Pegasus™ Verification System, and Virtuoso® Studio, constitutes Intel’s advanced packaging reference flow that leverages its EMIB technology and is optimized to work seamlessly with Intel 18A technology. The advanced EMIB 2.5D reference flow enables customers to successfully complete full-flow heterogeneous designs, seamlessly transitioning from system-level planning, physical optimization and analysis to DRC-aware implementation and physical signoff, with unmatched productivity and time to market.
  • Digital Full-Flow for Intel 18A: The complete AI-driven Cadence RTL-to-GDS flow has been certified and optimized for Intel 18A technology featuring RibbonFET gate-all-around transistors and PowerVia backside power delivery, enabling customers to meet their challenging PPA targets. The full flow includes the AI-driven Cadence Cerebrus™ Intelligent Chip Explorer, Genus™ Synthesis Solution, Innovus™ Implementation System, Quantus™ Extraction Solution, Quantus Field Solver, Tempus™ Timing Solution, Pegasus Verification System, Liberate™ Characterization, and Voltus™ IC Power Integrity Solution.
  • Custom/Analog Flow for Intel 18A: Cadence’s AI-based Virtuoso Studio, Spectre® Simulation Platform, Voltus-XFi Custom Power Integrity Solution and EMX Planar 3D Solver have all been certified for Intel 18A. Virtuoso Studio is integrated with the Innovus Implementation System, enabling a complete implementation methodology for mixed-signal designs. Virtuoso Studio supports the features required to complete complex analog/mixed signal designs such as automatic device and standard cell place-and-route (P&R), assisted device editing capabilities, integrated EM-IR checks, integrated signoff-quality parasitic extraction and integrated signoff-quality physical verification, delivering efficient design and layout implementation on the Intel 18A process.
  • Design IP for Intel 18A: Cadence’s leading-edge implementations of trailblazing standards for advanced high-performance computing (HPC) and artificial intelligence and machine learning (AI/ML) applications enable joint customers to achieve scalable, high-performance designs that accelerate time to market in Intel Foundry’s most advanced silicon technologies and 3D-IC packaging capabilities. Cadence Design IP for Intel 18A technology includes the enterprise-class PCI Express® (PCIe®) 6.0 and Compute Express Link (CXL), multi-standard PHY for LPDDR5X/5 8533Mbps to enable a diverse set of memory applications, Universal Chiplet Interconnect Express™ (UCIe™) to boost multi-die system in package integration and 112G extended long-reach SerDes for superior bit error rate (BER) performance.

“Our close collaboration with Intel Foundry on 3D-IC enablement, EDA flows and IP is yielding significant results for mutual customers developing complex AI-enabling semiconductors and electronic systems,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “The availability of the complete EMIB 2.5D advanced packaging flow and other key milestones demonstrate the strength of our partnership and our commitment to delivering next-generation system innovations.”

“The challenges of system-level exploration and optimization require co-design and co-optimization from RTL through package, board and system,” said Suk Lee, VP & GM, Ecosystem Technology Office, Intel Foundry. “We rely on Cadence as one of the key ecosystem partners to deliver best-in-class AI-powered EDA solutions and IP technology in pursuit of our goal to be a systems foundry for the AI era.”

About Cadence

Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For 10 years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2024 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. PCI Express and PCIe are registered trademarks or trademarks of PCI-SIG. Universal Chiplet Interconnect Express and UCIe are registered trademarks or trademarks of the UCIe Consortium. All other trademarks are the property of their respective owners.

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